From Quartz to Chip: The Borderless Semiconductor Factory

From Japan’s wafers to Taiwan’s fabrication and South Korean memory, chipmaking depends on a tightly concentrated, cross-border supply chain. No nation controls it end to end.

An AI accelerator designed in Santa Clara starts life as a silicon crystal pulled in Japan, gets etched in Taiwan using Dutch machines fitted with German mirrors, takes on South Korean memory, and reaches data centers after crossing three continents. No country controls the entire chain, and almost every link is in the hands of three companies or fewer. That is the industrial and geopolitical reality of a sector that, according to WSTS estimates, will top $1,500 billion in revenue in 2026—almost double last year.

Silicon: where the crystal is born

Two Japanese companies, Shin-Etsu Chemical and SUMCO, alone produce more than half of the silicon wafers on which the world prints its chips. Together with Taiwan’s GlobalWafers, Germany’s Siltronic, and South Korea’s SK Siltron, they form a five-supplier club that covers roughly 90% of the market.

The raw material is mundane; the processing is not. Quartzite is reduced in electric arc furnaces into metallurgical-grade silicon, 98–99% pure—an energy-intensive output that today is largely Chinese. The leap in quality comes with the Siemens process, which turns that material into electronic-grade polysilicon with “eleven nines” of purity, i.e., 99.999999999%. Here the names that matter are three: Germany’s Wacker Chemie, with plants in Burghausen, Bavaria, and in Tennessee; America’s Hemlock in Michigan; and Japan’s Tokuyama. Together with Korea’s OCI, which with Tokuyama is building , they supply almost all crystal growers.

The polysilicon is then melted at over 1,400 degrees and “pulled” using the method developed in 1916 by the Polish chemist Jan Czochralski. A seed crystal is dipped into the melt and slowly lifted out while rotating, until it forms a 300-millimeter-diameter single-crystal ingot weighing more than one hundred kilos. The ingot is sliced into disks less than a millimeter thick, then polished to a flatness measured in atoms.

This step, too, has its hidden dependency. The crucibles in which silicon melts are made of ultra-high-purity quartz, and the is a mining district of just a few thousand inhabitants: Spruce Pine, North Carolina, where Belgium’s Sibelco and Norway’s The Quartz Corp operate. When Hurricane Helene halted the mines for two weeks in September 2024, the entire industry held its breath.

Market shares, according to the , are as follows: Shin-Etsu about 28%, SUMCO 25%, GlobalWafers 15%, Siltronic 12%, SK Siltron 11%. The rest is contested by fast-growing Chinese producers, starting with NSIG. Japan alone hosts about 38% of global 300-millimeter wafer capacity, concentrated in a handful of sites: Shirakawa, in Fukushima Prefecture, for Shin-Etsu; Imari, in Kyushu, and Yonezawa for SUMCO. In 2011, the Tōhoku earthquake shut down Shirakawa itself and, according to estimates at the time, about one-fifth of global supply.

There is also an Italian piece in this geography. GlobalWafers controls MEMC, which grows crystals in Merano and produces wafers in Novara. Siltronic operates in Burghausen and Freiberg, Germany, and in Singapore; SK Siltron in Gumi, South Korea.

The design: California draws, but with others’ tools

The most advanced chips on the planet are designed by companies that do not even own a factory. Nvidia and AMD are headquartered in Santa Clara, Apple in Cupertino, Broadcom in Palo Alto, Qualcomm in San Diego: all “fabless,” meaning without manufacturing plants, all in California. Their product is a file, which at the moment of the so-called tape-out is handed over to a foundry on the other side of the Pacific.

To get to that file you need three things none of them produces in-house. The first is design software, EDA (Electronic Design Automation), without which it is impossible to lay out and verify tens of billions of transistors. The market is a three-player oligopoly: Synopsys with 31%, Cadence with 30%, and Siemens EDA with 13%, according to . The first two are Californian; the third is the former Mentor Graphics of Oregon, owned since 2017 by Germany’s Siemens.

How much this link matters was seen on May 23, 2025, when Washington ordered the three suppliers to suspend sales to China without a license. Synopsys and Cadence lost about 10% on the stock market in a single day; the ban was lifted a few weeks later as part of the trade truce with Beijing. But the message had landed: whoever controls the software controls who gets to design.

The second thing is intellectual property. The processor architecture of virtually all smartphones—and a growing share of servers and laptops—is licensed from Arm, a company in Cambridge in the United Kingdom, controlled by Japan’s SoftBank. The open alternative, RISC-V, is the path China is betting on to free itself from Western licenses.

The third is the foundry’s “rule kit,” the Process Design Kit. A design is written for a specific process from a specific manufacturer: moving it elsewhere means redoing much of it, at costs that, for the most advanced nodes, industry estimates put on the order of hundreds of millions of dollars. That is why a TSMC customer does not become a Samsung or Intel customer from one quarter to the next, and why the dependence between designers and manufacturers runs both ways.

The machines: a Dutch monopoly, Japanese chemistry

Only one company in the world knows how to build the machines that etch the most advanced chips: the Dutch firm ASML, headquartered in Veldhoven. Its extreme ultraviolet (EUV) scanners work with 13.5-nanometer light, produced by firing a laser at tens of thousands of tin droplets per second. They cost on the order of $200 million each—almost double in the latest high numerical aperture (High-NA) version.

But even the monopolist depends on others. The mirrors—the smoothest ever made—come from Germany’s Zeiss in Oberkochen; the laser from Germany’s Trumpf; the light source from Cymer in San Diego, which ASML acquired in 2013. That U.S. component is what gives Washington legal leverage over Dutch sales. No EUV machine has ever been delivered to China.

Around lithography work the other four giants in semiconductor equipment: the U.S. firms Applied Materials, Lam Research and KLA, for deposition, etching and inspection, and Japan’s Tokyo Electron. Together with ASML, they are the top five suppliers in a market that in 2025, according to , reached $136.2 billion, up 13%. The United States, the Netherlands and Japan therefore control access to the tools: not by chance, they are the three countries that since 2022–2023 have coordinated export bans toward Beijing.

Japan also holds a second, less visible card: chemicals. The photosensitive resins (photoresist) without which lithography cannot work come, according to the most widely cited estimates, about 90% from five Japanese groups: JSR, Tokyo Ohka Kogyo, Shin-Etsu, Sumitomo Chemical and Fujifilm. When in July 2019 Tokyo restricted exports to South Korea of three materials for chips and displays, resins included, over a dispute that had nothing to do with chips, Samsung and SK hynix found themselves in an emergency within days.

China, shut out of the high end, is building its own supply chain with Naura, AMEC and SMEE. According to estimates by Yole Group , Chinese self-sufficiency in equipment was around 23% last year and will rise to 39% by 2030.

Foundries: nearly three quarters of the market in the hands of a single Taiwanese group

TSMC closed the second quarter of 2026 with 72.5% of the global foundry market, an all-time high. This is certified by : of the $53.49 billion in revenue booked in three months by the top ten foundries, $40.2 billion went to the Hsinchu-based group. Samsung is second with 5.9%, China’s SMIC third with 5.4%, followed by Taiwan’s UMC (3.9%) and America’s GlobalFoundries (3.2%).

The ranking measures revenue, not technological capability, and at the leading edge the imbalance is even starker. TSMC’s 5-, 4- and 3-nanometer lines are fully booked by customers such as Apple, Nvidia, AMD, Qualcomm, Broadcom and MediaTek; according to the most cited estimates, more than 90% of the world’s most advanced logic comes out of Taiwanese fabs. Even Intel, a direct competitor, has had some of its recent processors made in Taiwan.

The pursuers face opposite problems. Samsung has owned EUV machines for years but in the quarter it grew by only 1.8% in a market that rose 11.5%: major customers chose TSMC, even if Tesla’s multi-year order for the Taylor, Texas plant has given it breathing room again. SMIC cannot buy EUV machines, yet it grew 20% thanks to demand for mature processes; in the advanced segment it stops at the 7-nanometer class, achieved by pushing the previous-generation lithography to its limit and at much higher costs.

Intel remains the most political case. Its 18A process is in production in Arizona with Panther Lake processors, but external customers are scarce and the group has warned that the next node, 14A, could be suspended without a heavyweight client. Since August 2025, among the top shareholders is : Washington considers Intel the only advanced foundry under American ownership and does not intend to lose it.

Meanwhile, TSMC is expanding beyond the island, more under political pressure than for reasons of convenience. This year it will invest between $52 and $56 billion; in Arizona it is already producing Nvidia chips, and in July it brought its overall commitment to . In Kumamoto it works with Sony, Denso, and Toyota; in Dresden with Bosch, Infineon, and NXP. In Japan, the public-private consortium Rapidus is targeting 2-nanometer production in 2027 with IBM technology, but .

How small is a nanometer

TSMC’s N2 process, set for volume production from the second half of 2025, reaches about 313 million transistors per square millimeter. It is the for high-density cells, which assigns 238 million to Intel’s 18A process and 231 million to Samsung’s SF2. On an area the size of a fingernail, in theory, more than thirty billion transistors could fit.

A historical comparison shows the scale of the journey. Intel’s 4004 from 1971, the first commercial microprocessor, designed under the leadership of Federico Faggin from Vicenza, contained 2,300 transistors on 12 square millimeters: fewer than 200 per square millimeter. In fifty-five years, density has grown by more than one and a half million times. Nvidia’s Blackwell graphics processors, according to figures the company has stated, integrate 208 billion transistors.

It should be said that “2 nanometers” is a commercial label, not a measurement. No element of the transistor is 2 nanometers wide: according to the international IRDS roadmap, at this generation the distance between two adjacent gates is around 45 nanometers, and the minimum pitch between metal interconnect lines around 20. These are still dizzying dimensions, considering that silicon’s crystal lattice repeats every 0.54 nanometers: between one line and the next there are only a few dozen atomic cells. A single SRAM memory cell on the N2 process occupies 0.0175 square microns.

To keep shrinking, the very shape of the transistor has changed. The planar transistor gave way in 2011 to the FinFET, with its fin-shaped channel, and now to GAA (gate-all-around), in which the gate wraps on four sides around thin stacked silicon nanosheets. Samsung introduced it first in 2022; TSMC is adopting it with N2, and Intel with 18A under the name RibbonFET. The next step, already demonstrated in the lab by all three groups, is CFET, which stacks one transistor on top of another.

The other novelty is backside power delivery: bringing current through the rear side of the wafer frees the front side for signals. Intel got there first with PowerVia technology on 18A; TSMC will respond with the A16 process, at a nominal 1.6 nanometers, expected between late 2026 and 2027. At these scales, a wafer goes through hundreds of steps and stays in the fab for months, and yield—the share of working chips—matters more than technological primacy: it is the ground on which TSMC has pulled away from its rivals.

Microprocessors: Intel below 70% for the first time since 1995

In the second quarter of 2026, Intel’s share of x86 processors fell to 69.3%, below the 70% threshold for the first time in thirty-one years. AMD rose to 30.7%, and to 34.1% if console and embedded-system chips are also counted. The data come from , an industry benchmark, and measure units shipped.

AMD is gaining in every segment: 34.9% in desktops, 28.9% in laptops, 34.5% in servers, where a direct comparison between the EPYC and Xeon families takes it to 46.4%. A year ago its share in personal computers was 23.9%; today it is 30.3%. The desktop market, however, has shrunk by more than 20% year on year, and the cause is not processors but memory: the rise in the price of DRAM and solid-state drives has pushed up computer prices and curbed purchases. This is a first example of how the segments affect one another.

The x86 duopoly is no longer the whole market. Chips based on the Arm architecture—namely Apple Silicon and Qualcomm’s Snapdragon—were worth about 14% of personal computers at the beginning of the year, according to Mercury. In data centers, Amazon, Google and Microsoft design their own Arm processors, and Nvidia itself pairs an Arm CPU with its cards.

The industrial reality is that the two historic rivals depend on the same factory. AMD has not produced anything in-house since 2009, when it spun off its plants into GlobalFoundries: its Ryzen and EPYC come off TSMC’s lines, and the next generation of EPYC is among the first products on the 2-nanometer process. Intel still manufactures internally—across Oregon, Arizona, Ireland and Israel—but it has outsourced important parts of its recent processors to TSMC. For both, testing and final assembly take place largely in Southeast Asia, between Malaysia and Vietnam, and in China.

Making the picture even more intertwined, in 2025 Nvidia took a stake in Intel with a multibillion-dollar investment, alongside the U.S. government and Japan’s SoftBank.

Graphics cards and accelerators: Nvidia’s realm

Nine out of ten desktop graphics cards run on an Nvidia processor. In the second quarter of 2026, according to , 12.5 million were shipped—the highest figure since 2022: about 90% to Nvidia, 8% to AMD, 2% to Intel. If you include graphics integrated into processors, the picture flips, with Intel at 56%, Nvidia at 23% and AMD at 21%, but that is leadership in volume, not in value.

Value now lies elsewhere. In the quarter ending July 26, Nvidia posted revenue of , more than double a year earlier, and 89 billion came from data centers: over 92% of the total, with a gross margin of 75%. The graphics card born for videogames has become the engine of artificial intelligence, and the attribute around 90% of accelerators sold to Nvidia.

Competition comes from two directions. AMD offers the Instinct line. Above all, the biggest customers are designing custom chips to reduce dependence: Google with TPUs; Amazon, Meta, Microsoft and OpenAI with their own accelerators, often developed with partners such as Broadcom and Marvell. These, however, still end up on the same TSMC production lines and require the same memory.

Nvidia, in fact, manufactures nothing. Blackwell processors are etched by TSMC at 4 nanometers; the new Vera Rubin platform, in full production since the summer, at 3 nanometers. The real bottleneck is not lithography but advanced packaging—TSMC’s CoWoS technology, which places the processor side by side with stacks of HBM memory. Capacity, , will rise this year to 120–140 thousand wafers a month, and the gap versus demand—around 20% at mid-year—should fall to 10% only in December.

A logistical paradox follows. The wafers etched at TSMC’s new Arizona plant largely have to be sent back to Taiwan for assembly, because that is where advanced packaging is concentrated. As for consumer graphics cards, the chip is Californian, but the boards are assembled by Taiwanese brands such as Asus, MSI, and Gigabyte, using Korean or American graphics memory.

Finally, there is the China chapter. Nvidia’s outlook for the current quarter—$108 billion in revenue—includes no sales of data-center chips to the Chinese market: U.S. controls on the one hand, and Beijing’s push toward domestic suppliers on the other, have in effect shut it down.

Memory: three producers, a supercycle, and a Chinese fourth wheel

Samsung Electronics has returned to the top in DRAM, with 39% of global revenue in the second quarter of 2026. SK hynix, which a year ago led with the same share, has slipped to 26%, closely followed by U.S.-based Micron at 25%. These are figures from : three companies account for 90% of a market that has nearly quintupled in twelve months.

SK hynix’s decline is only relative. Its revenue has tripled, but competitors have grown faster because the price surge benefited conventional DRAM most of all, where Samsung is stronger. Micron, according to Counterpoint, has multiplied its DRAM revenue fivefold in a year.

The Chinese fourth wheel is CXMT, ChangXin Memory Technologies, based in Hefei. Its revenue grew 716% year-on-year, driven by domestic demand, and its share rose from 4% to a value between depending on the survey. On June 27 it listed in Shanghai, quintupling its price on debut. It has no access to EUV machines and remains several generations behind, but it is filling the segment the big three are abandoning.

HBM, the memory that reshaped the hierarchy

HBM (High Bandwidth Memory) is a stack of twelve or sixteen thinned DRAM chips, connected vertically by thousands of metal-lined vias, mounted next to the graphics processor. It is the component that enables accelerators to feed artificial intelligence models, and it is the product on which SK hynix built its overtake of Samsung.

In the second quarter, SK hynix held 50% of the HBM market, down from 64% a year earlier; Samsung climbed back to 33%, and Micron stands at 18%. For the new HBM4 generation, destined for the Vera Rubin platform, Nvidia has qualified all three suppliers: , with Samsung credited with 25–30%.

HBM ties memory makers to foundries in a new way. The base layer of the stack is now a logic chip: SK hynix has it manufactured at TSMC, while Samsung makes it on its own 4-nanometer lines. A Korean product, then, contains silicon etched in Taiwan before being assembled—again in Taiwan—on top of a processor designed in California.

Why prices have exploded

HBM consumes, for the same number of bits, far more manufacturing capacity than standard DRAM. By shifting lines toward data centers, the big three have left PCs, phones, and consumer electronics undersupplied. According to TrendForce, contract prices for conventional DRAM rose 93–98% in the first quarter of 2026 and 58–63% in the second; the increase slowed to 13–18% in the third and is .

The impact on the sector’s financials is unprecedented. estimates that in 2026 the memory market will exceed $800 billion, up by about 250%—more than half of the entire semiconductor industry.

Here, too, the flag is misleading. Micron is headquartered in Boise, Idaho, but produces most of its DRAM in Taiwan and in Hiroshima, Japan; the new U.S. plants will come later in the decade. SK hynix has a significant share of its DRAM capacity in Wuxi, China, under a U.S. license. And all of them depend on Japanese wafers and Dutch and American tools.

Beyond the capacitor: the 1T1C cell and hafnium–zirconium

The DRAM memory cell has been the same for sixty years: one transistor and one capacitor, 1T1C, following the design devised by Robert Dennard at IBM in the second half of the 1960s. A bit is an electric charge stored in the capacitor. Because the charge leaks away, it must be rewritten more than ten times a second: this is the “refresh” that makes the memory dynamic—and that consumes energy even when the computer is doing nothing.

The problem is physical. Today’s generations, known as the 10-nanometer class and now in their sixth iteration (1c), use capacitors that look like extremely tall, extremely thin pillars. Shrinking them further without losing capacitance requires ever-better insulators: this is why zirconium and hafnium oxides are already the dielectric in DRAM capacitors today.

The potential breakthrough stems from a discovery made public in 2011. Researchers associated with Qimonda in Dresden—the last European DRAM producer—observed that ultra-thin films of hafnium oxide can be ferroelectric, meaning they can retain an electrical polarization even without power. An equal-parts mixture of hafnium and zirconium (Hf₀,₅Zr₀,₅O₂, abbreviated HZO) has proved the most promising: it works at thicknesses around 10 nanometers and is compatible with existing manufacturing processes, unlike the older lead-based ferroelectrics.

By replacing the capacitor dielectric with ferroelectric HZO, the cell remains 1T1C but changes its nature. The bit is no longer a charge that fades; it is the direction of a polarization that persists. The result is a memory almost as fast as DRAM but non-volatile, with no need for refresh.

Progress has been swift:

Sony, together with the Dresden institutes NaMLab and Fraunhofer, demonstrated a working device at 2.5 volts with read and write times under 10 nanoseconds.
In 2023 Micron presented a 32-gigabit prototype dubbed NVDRAM: a 1T1C ferroelectric cell, vertical transistors, and two layers of cells stacked on the same chip.
France’s CEA-Leti center announced in June 2026, with 0.047-square-micron cells operating at 1.3 volts.

The obstacle separating the lab from server memory modules is endurance. A DRAM must withstand a virtually unlimited number of cycles, whereas ferroelectric films fatigue much sooner. For this reason, the first expected applications are embedded memories on chips and low-power systems, not replacement of main DRAM. In parallel, related hafnium–zirconium compositions are being studied to increase the capacitance of conventional capacitors.

The other route is geometric. Today’s cells occupy six elementary “squares” (6F²); turning the transistor vertical brings that down to four (4F²), saving roughly 30% in area. Samsung showed at this year’s ISSCC; SK hynix made it the centerpiece of its , followed by three-dimensional DRAM, with layers stacked as is already done in flash memory.

The industrial consequence is not secondary. Vertical architectures depend less on EUV lithography and more on deposition and etching: according to SK hynix researchers, they could halve EUV-related costs. Looking ahead, this is terrain on which the advantage of those with access to ASML machines diminishes.

The journey of an accelerator, country by country

Tracing a single product—an Nvidia accelerator for data centers—shows that at least eight countries are indispensable, and none is sufficient. The stages, in order:

United States, North Carolina. The Spruce Pine mines produce ultra-pure quartz for the crucibles in which silicon will be melted.
Germany, United States, Japan. Wacker, Hemlock, and Tokuyama refine polysilicon to eleven nines of purity.
Japan. Shin-Etsu and SUMCO pull the crystal and slice 300-millimeter wafers.
California and the United Kingdom. Nvidia designs the chip in Santa Clara using Synopsys and Cadence software; the accompanying CPU uses the Arm architecture.
Netherlands, Germany, United States, Japan. ASML scanners with Zeiss optics, the machines from Applied Materials, Lam, KLA, and Tokyo Electron, and Japanese photoresists equip the fab.
Taiwan. TSMC etches the processor at 4 or 3 nanometers, in Tainan or Hsinchu; a growing share comes out of Arizona.
South Korea. SK hynix and Samsung produce the stacks of HBM memory; Micron complements them from Taiwan and Japan.
Taiwan. TSMC combines processor and memory with CoWoS assembly, on substrates that use Japanese insulating materials.
Taiwan, Mexico, United States. Foxconn, Quanta, and Wistron assemble boards, racks, and cooling systems.
Final destination. Data centers in the United States, Europe, the Gulf, and Asia—with the exception, for now, of China.

A disruption at any one of these points brings all the others to a stop. And in almost all of them, the number of alternative suppliers is between zero and two.

The supply chain in numbers

In every link, the top three players control at least two thirds of the market, and in four cases out of eight the leader has more than half.

Link	Players and shares	Headquarters	Period and source
Silicon wafers	Shin-Etsu 28%, SUMCO 25%, GlobalWafers 15%, Siltronic 12%, SK Siltron 11%	Japan, Taiwan, Germany, South Korea	2025, industry estimates
Design software (EDA)	Synopsys 31%, Cadence 30%, Siemens EDA 13%	United States, Germany	2024, TrendForce
EUV lithography	ASML 100%	Netherlands	sole supplier
Foundries	TSMC 72.5%, Samsung 5.9%, SMIC 5.4%, UMC 3.9%, GlobalFoundries 3.2%	Taiwan, South Korea, China, United States	Q2 2026, TrendForce, revenue
x86 processors	Intel 69.3%, AMD 30.7%	United States	Q2 2026, Mercury Research, units
Desktop graphics cards	Nvidia about 90%, AMD about 8%, Intel about 2%	United States	Q2 2026, Jon Peddie Research, units
DRAM memory	Samsung 39%, SK hynix 26%, Micron 25%, CXMT 7–10%	South Korea, United States, China	Q2 2026, Counterpoint, revenue
HBM memory	SK hynix 50%, Samsung 33%, Micron 18%	South Korea, United States	Q2 2026, Counterpoint

The shares are not uniform: some measure revenue, others units shipped, and the “Headquarters” column indicates where the company is based, not where it manufactures.

How we got here: sixty years of offshoring

The geographic dispersion of the supply chain is not a recent accident: it began a few years after the invention of the integrated circuit, and unfolded in four waves.

The first wave: assembly. The transistor was born at Bell Labs in 1947; the integrated circuit between 1958 and 1959, with Jack Kilby at Texas Instruments and Robert Noyce at Fairchild, the company founded in 1957 by eight engineers who left William Shockley’s lab. The first customers were the Pentagon and NASA. Already in the early 1960s, however, Fairchild moved the manual work of soldering and testing to Hong Kong, where wages were a fraction of those in California. Singapore, Malaysia, the Philippines, Taiwan, and South Korea followed. This set a pattern destined to last: design and etching at home, assembly in Asia, within the perimeter of America’s Cold War alliances.

The second: Japan. In the 1970s Tokyo coordinated its electronics groups in a major public–private research program. Japanese memory chips proved more reliable and cheaper; by the mid-1980s Japan overtook the United States in market share, and Intel, in 1985, abandoned DRAM to focus on microprocessors. Washington responded with the 1986 semiconductor agreement, punitive tariffs the following year, and the Sematech consortium. It is the direct precedent for today’s policies. Japan would later lose primacy in chips, but would retain it in materials and equipment: that is why silicon and resins still pass through there.

The third: Korea and Taiwan. Samsung entered DRAM in 1983 and in less than ten years was number one in the world, thanks to investments no competitor could match. The resulting price wars eliminated rivals one by one: Germany’s Qimonda went bankrupt in 2009; Japan’s Elpida in 2012 and was absorbed by Micron. Three remain. In Taiwan, in 1987, Morris Chang, after twenty-five years at Texas Instruments, founded TSMC with capital from the government and Philips, and with an idea that was eccentric at the time: to manufacture only chips designed by others.

The fourth: the separation between those who design and those who manufacture. The pure-play foundry model makes the fabless company possible. Qualcomm, Broadcom, and Nvidia, founded in 1993, grow without ever building a plant; in 2009 AMD, too, sells off its own. Meanwhile, the cost of a cutting-edge fab rises beyond twenty billion dollars, and the number of manufacturers able to remain at the frontier falls from more than twenty in the early 2000s to three: TSMC, Samsung, and Intel. ASML itself, founded in 1984 as a spin-off from Philips, reaches EUV only after twenty years of development, partly financed by its three largest customers.

The result can be read in the figures of the Semiconductor Industry Association: the United States’ share of global manufacturing capacity has fallen from 37% in 1990 to about 12% in 2020; Europe’s from 44% to under 10%. Efficiency has been extraordinary—and so has concentration. China, where SMIC was founded in 2000 and which in 2014 launched its first major state fund for chips, entered this story when the seats had already been assigned.

Geopolitics: subsidies, tariffs, and chokepoints used as weapons

Since 2022, all the governments involved have stopped treating the supply chain as a matter for the market. Each has identified the link it controls and begun using it as leverage.

United States: from subsidies to equity participation. The CHIPS and Science Act of August 2022 allocates about $52 billion to bring manufacturing back home. Two months later, on October 7, export controls arrive targeting China—covering advanced chips and the machines used to produce them—then expanded in 2023 and 2024 to include HBM memories. With the second Trump administration, the tools change. In August 2025, contributions to Intel are converted into a 9.9% stake. On January 14, 2026, a proclamation based on Section 232 imposes , paired with a licensing regime that partially reopens sales to China.

Taiwan: the silicon shield put up as collateral. The following day, January 15, Washington and Taipei announce : tariffs cut from 20% to 15% in exchange for at least $250 billion in direct investment by Taiwanese companies in the United States and another $250 billion in credit guarantees. The stated goal of the U.S. administration is to relocate roughly 40% of Taiwan’s supply chain. For Taipei, it is a delicate balance: the concentration of chips on the island is also its main strategic insurance policy, and for now both the most advanced processes and much of the packaging remain at home.

China: self-sufficiency out of necessity. Beijing responds on three fronts. The first is industrial: state funds, the growth of SMIC and CXMT, and a project coordinated by Huawei that, , assembled in Shenzhen a prototype EUV machine using components from old ASML systems and aims to produce working chips by 2028. The second is retaliation on raw materials: China dominates the production of gallium and germanium, banned their export to the United States in December 2024, and then . The third is the demonstration that even mature chips are a weapon: when in autumn 2025 The Hague took control of Nexperia, a Dutch manufacturer owned by Chinese interests, Beijing blocked exports from its plants in China and Europe’s automotive industry came close to a shutdown.

Japan and South Korea: exposed allies. Tokyo is financing the Rapidus project with thousands of billions of yen and has attracted TSMC to Kumamoto, in an attempt to return to advanced logic. Seoul is in the most awkward position: Samsung and SK hynix have major memory fabs in China, which operate only thanks to renewable U.S. licenses, and count China as a primary customer.

Europe: strong upstream, absent downstream. The European Chips Act of 2023 mobilizes €43 billion with the goal of reaching 20% of global production by 2030—a target the European Court of Auditors itself has judged out of reach. Intel has cancelled the Magdeburg plant. Europe nevertheless retains indispensable links in the chain—ASML, Zeiss, Siltronic and Wacker—and a solid position in power chips and automotive semiconductors with Infineon, NXP and STMicroelectronics. The latter has some of its main facilities in Italy, between Agrate Brianza and Catania.

An interdependence that no one can untangle quickly

None of the major players can do it alone, and none will be able to within this decade. The United States designs and controls software and a large share of the machines, but fabricates at home only a fraction of the chips it designs. Taiwan fabricates, but using Dutch, American, and Japanese machines on Japanese silicon. Korea dominates memory, but depends on the same suppliers and has fabs in China. China is building a parallel supply chain, but remains a few generations behind at the frontier. Europe owns some unique links and almost no advanced production.

Bringing one link back home does not bring the chain back: the Arizona plant that ships wafers back to Taiwan for assembly is the clearest image of that. There are four next steps to watch:

the 27 November 2026 deadline, when the Chinese suspension of the ban on gallium and germanium ends;
the decision by the first external customers on Intel’s 14A process, expected between late 2026 and the first half of 2027;
the trend in memory prices, which will indicate whether the supercycle holds up beyond data centers as well;
2028, the year in which Beijing wants to produce its first chips using its own EUV machine.

Sources

Market shares are those published by the cited research firms, updated where possible to the second quarter of 2026. The historical reconstruction is based on publicly known facts. Four figures are current estimates not corroborated by a primary source and should be cited as such: Japan’s share in photoresists, Taiwan’s share in the most advanced logic, the price of EUV machines, and Nvidia’s share in accelerators.

Overall market

Silicon and materials

Design and equipment

Foundries and processes

Processors and graphics cards

Memory

Geopolitics